In the recent development of integrated circuit (IC) chip mounting technologies, an IC chip is frequently bonded to another electronic substrate by establishing electrical communication between conductive bumps built on the IC chip and bond pads provided on the electronic substrate. When such bonding technique is used, an anisotropic conductive film (ACF) is frequently provided between the IC chip and the electronic substrate such that electrically conductive particles embedded in the ACF provide such electrical communication.
Referring initially to FIGS. 1A-1C, a typical process for bonding a microelectronic structure to an electronic substrate is shown. The microelectronic structure 10 is provided with multiple, electrically-conductive bumps 12 formed on a top surface for providing electrical communication to microelectronic circuits (not shown) in the microelectronic structure 10. The conductive bump 12 is built on a bond pad 14 and a seed layer 16, and is insulated by a dielectric layer 18. The electronic substrate 20, on the other hand, is provided with multiple bond pads 22 formed on a top surface 24. The electronic substrate 20 may be a printed circuit board, Si substrate or glass substrate, for example. An anisotropic conductive film 30 that has multiple, electrically-conductive particles 32 embedded in an electrically-insulating material 34 is positioned on the top surface 24 of the electronic substrate 20.
After the microelectronic structure 10, the electronic substrate 20 and the ACF 30 are placed in heated bonding equipment and a suitable pressure is applied to press the microelectronic structure 10 against the electronic substrate 20, an electronic assembly 40 is formed which is shown in FIG. 1C. As seen in FIG. 1C, electrical communication between the microelectronic structure 10 and the electronic substrate 20 is established by electrically-conductive particles 32a, 32b and 32c which provide electrical conductance between the conductive bumps 12 and the bond pads 22.
The bonding method by using ACF can be efficient and low cost. However, since the distribution of the electrically-conductive particles 32 cannot be controlled in an orderly manner when it is dispersed and embedded in the insulating material 34, a cluster of the electrically-conductive conductive particles 32 frequently occurs which may cause an undesirable electrical short between adjacent conductive bumps 12. This is shown in FIG. 1D. While the electrically-conductive particles 32a, 32b and 32c provide desirable electrical communication between the conductive bumps 12 and the bond pads 22, the electrically-conductive particles 32d also cause undesirable electrical shorting between the two adjacent conductive bumps 12. When such electrical shorting occurs, the electronic circuits in the microelectronic structure 10 may be damaged or otherwise become non-functional. Such electrical shorting, therefore, must be avoided.
As one solution to the problem, ACF suppliers have developed an ACF film that exhibits a controlled pattern of distribution of the electrically-conductive particles in the insulating material. However, such tightly-controlled distribution ACF films are produced at very high cost, and therefore, render impractical bonding techniques using the film.
It is therefore an object of the present invention to provide conductive bumps and a method of fabricating conductive bumps having at least one non-conductive sidewall, outer wall or inner wall to prevent electrical bridging between adjacent conductive bumps on a substrate.
It is another object of the present invention to provide conductive bumps each of which includes at least one non-conductive sidewall, outer wall or inner wall that faces an adjacent conductive bump to prevent electrical bridging between adjacent conductive bumps.
Still another object of the present invention is to provide multiple conductive bumps on an IC chip, each of which conductive bumps includes at least one sidewall, outer wall or inner wall covered with a conductive layer to provide electrical conductance between the IC chip and an electronic substrate bonded to the IC chip, and at least one sidewall, outer wall or inner wall which remains uncovered by a conductive layer to prevent electrical bridging between adjacent conductive bumps and short-circuiting of the chip.
Yet another object of the present invention is to provide multiple conductive bumps each of which includes at least one non-conductive sidewall, outer wall or inner wall that faces an adjacent conductive bump on an IC chip and may be provided with a test probe pad for the test probing of the conductive bumps on the chip.
A still further object of the present invention is to provide an IC chip that includes multiple conductive bumps each of which is provided with at least one non-conductive sidewall, outer wall or inner wall and is applicable to fabrication of both ACF flip-chip electronic assemblies and NCF (Non-Conductive Film) flip-chip electronic assemblies.
Yet another object of the present invention is to provide a method of fabricating an IC chip which includes multiple conductive bumps each of which includes at least one non-conductive sidewall, outer wall or inner wall which stands juxtaposed to an adjacent conductive bump to prevent electrical conductance between the bumps and short-circuiting of the chip.